Dr Partha Roop
PhD (UNSW Australia), M. Tech (IIT, Kharagpur) and BE (College of Engineering, Anna University)
Partha Roop is an academic in the Department of Electrical and Computer Engineering at the University of Auckland, New Zealand. He is currently the Chair of the Student Staff Consultative Committee http://www.ece.auckland.ac.nz/en/about/our-department/sscc.html
He completed his PhD in Computer Science and Engineering at the University of New South Wales, Sydney, Australia, a M.Tech at Indian Institute of Technology in Kharagpur, India and a BE degree at Anna University (College of Engineering), Madras, India. Partha had visiting positions in Kiel University, Germany (collaboration with the Embedded Systems Group: http://www.informatik.uni-kiel.de/en/rtsys/, French National Laboratory of Informatics and Control (SPADES team Grenoble: https://team.inria.fr/spades/), and Iowa State University (http://www.ece.iastate.edu). He collaborates with University of California, Berkeley in the PRET project: http://chess.eecs.berkeley.edu/pret/.
He heads the precision timed systems research group: http://homepages.engineering.auckland.ac.nz/~pretzel/. His group has created a tool-chin for the design of automation and embedded systems using the IEC61499 standard. The tool and associated benchmarks are available for download from: http://timeme.io.
Partha co-founded APIMatic, a cloud services company for automatic SDK generation using the model-driven approach. He has co-authored two research monographs:
Model-Driven Design Using IEC 61499: A Synchronous Approach for Embedded and Automation Systems (2015): http://link.springer.com/book/10.1007%2F978-3-319-10521-5
Correct-by-Construction Approaches for SoC Design (2013): http://link.springer.com/book/10.1007/978-1-4614-7864-5
Research | Current
My primary research interests are:
- Real-Time Systems http://pretzel.ece.auckland.ac.nz/
- Computer Engineering for Biological Systems (Bio-Emulation) http://pretzel.ece.auckland.ac.nz/bio
- Android and medical device security
- Medical Devices
- Heart Modelling and Pacemakers
- Intelligent Transportation Systems
- Software Engineering for web / cloud services
- Industrial Automation
Teaching | Current
- COMPSYS 202 - Object Oriented Design and Programming
- COMPSYS 303 - Microcomputing for Embedded Systems
- COMPSYS 705 - Formal Methods for Engineers
- COMPSYS 302 - Software Design 2
- COMPSYS 723 - Embedded Systems Design (until 2015)
- Matthew Kuo (PhD), Time predictable industrial automation systems
- Zeeshan Bhatti (PhD), Unified functional safety analysis.
- Adeel Ali (PhD), Model driven approach for cloud services.
- Hugh Wang (PhD), Scalable static timing analysis of concurrent programs.
- Mahmood Hikmet (PhD), Fairness and timing issues in vehicular communication.
- Neha Sharma (PhD), Adaptive traffic control systems.
- Jin Ro (PhD), Functional safety issues in robotics.
- Hammond Pearce (PhD), Precision Timed Automation Architectures
- Nathan Allen (PhD), Modular Compilation for Human Organ Models.
- Dr Roopak Sinha, Senior Lecturer (AUT)
- Dr Li Hsien Yoong (Invenco)
- Dr Gareth Shaw (Navman)
- Dr Simon Yuan (Navico)
- Dr Sidharta Andalam (TUM-CREATE, Singapore)
- Dr Eugine Yip (Bamberg University Postdoc)
- 15 Master of Engineering thesis students
- Alexander von Humboldt fellowship for experienced researchers 2009
- French national laboratory for informatics and control (INRIA) visiting professor 2014
- Mercator Fellowship, German Science Foundation (DFG), 2016
- Research group leader, Bio-Remulation Group
- Research group leader, Precision Timed Systems group
Areas of expertise
- Embedded Systems
- Real-Time Systems
- Real-Time Organ Modelling and Medical Devices
- Intelligent Transportation Systems
- Industrial Automation
- New Zealand review group, ISO Technical Committee 204
- Associate Editor, IEEE Embedded Systems Letters (http://ieee-ceda.org/publications/esl/editorial-board)
- Associate Editor, Elsevier MICPRO (until 2015)
- Associate Editor, Springer/EURASIP journal on embedded systems
- General Co-Chair, IEEE ISORC 2015 (http://www.isorc2015.org)
- Technical Program Committee Membership
- ACM EMSOFT (http://www.emsoft.org)
- IEEE RTAS (http://2015.rtas.org)
- IEEE ACSD (http://www.ulb.ac.be/di/verif/pn2015acsd2015/cfp.html)
Selected publications and creative works (Research Outputs)
- Sinha, R., Roop, P. S., Shaw, G., Salcic, Z., & Kuo, M. M. Y. (2016). Hierarchical and Concurrent ECCs for IEC 61499 Function Blocks. IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS, 12 (1), 59-68. 10.1109/TII.2015.2496262
Other University of Auckland co-authors: Zoran Salcic
- Kuo, M. M. Y., & Roop, P. S. (2015). New Design Patterns for Time Predictable Execution of Function Blocks. Distributed Control Applications Guidelines, Design Patterns, and Application Examples with the IEC 61499 (pp. 69-91). CRC Press.
- Zhao, Y. U., & Roop, P. S. (2015). Model-Driven Design of Cardiac Pacemaker Using IEC 61499 Function Blocks. In A. Zoitl, T. Strasser (Eds.) Distributed Control Applications: Guidelines, Design Patterns, and Application Examples with the IEC 61499 (pp. 335-361). CRC Press.
- Malik, A., Roop, P. S., Andalam, S., Yip, E., & Trew, M. (2015). A synchronous rendering of hybrid systems for designing Plant-on-a-Chip (PoC). , abs/1510.04336. arxiv. Related URL.
Other University of Auckland co-authors: Avinash Malik, Mark Trew
- Sinha, R., Girault, A., Goessler, G., & Roop, P. S. (2014). A Formal Approach to Incremental Converter Synthesis for System-on-Chip Design. ACM Transactions on Design Automation of Electronic Systems, 20 (1), 1-30. 10.1145/2663344
- Andalam, S., Roop, P. S., Girault, A., & Traulsen, C. (2014). A Predictable Framework for Safety-Critical Embedded Systems. IEEE Transactions on Computers, 63 (7), 1600-1612. 10.1109/TC.2013.28
- Sinha, R., Roop, P. S., & Ranjitkar, P. (2013). Virtual Traffic Lights+ : A Robust, Practical, and Functionally Safe Intelligent Transportation System. Transportation Research Record, 2381, 73-80. 10.3141/2381-09
Other University of Auckland co-authors: Prakash Ranjitkar
- Wang, J. J., Roop, P. S., & Andalam, S. (2013). ILP<inf>c</inf>: A novel approach for scalable timing analysis of synchronous programs. 2013 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2013. 10.1109/CASES.2013.6662526